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The
basic idea of this study is based on a previously developed laser
spallation technology in which a transient compressive stress pulse
of 1-2 nanoseconds (ns) rise-time and 16-20 ns total duration is
generated on the backside of a substrate by exfoliating a constrained
metallic film by using a 3 ns-long Nd:YAG laser pulse (Fig. 1).

Figure 1. Laser spallation method
The stress pulse is made to propagate
towards a test coating deposited on the substrate’s front
surface, and whose fundamental interface tensile strength (adhesion)
is to be measured. The compressive stress pulse reflects into a
tensile wave from the free surface of the coating and pries off
its interface. The free surface velocity of the coating during separation
is measured using an optical interferometer to quantitatively determine
the interface strength. Films with thickness greater than 1 micron
could be separated.
Recently it was discovered that
the profiles of these stress waves could be changed to one having
a rarefaction shock (i.e, having finite rise times but with post-peak
decay time of almost zero), after propagating the initial waves
through glasses. This allows separation of films with thickness
approaching 50 nm, and with interface strengths nearing 2.7 GPa!
An interesting extension of this technique (Fig. 2), which is the
subject of the present study, is to separate individual lines, squares,
and circular thin film patches deposited on a Si or a glass or for
that matter on any mother substrate using the laser-generated
stress-waves, and catch the separated features or “legos”
on a target substrate that is kept in close vicinity of the separating
structures.

Figure 2. Pattern transfer idea
Combination with already matured
alignment technology can allow development of MEMS structures and
IC geometries in an efficient way. In some cases, the traditional
wet-etching processing step, which frequently leads to problems
of stiction, can be bypassed. However, appropriate adhesion-promoting
molecular bonding sites must be chosen for bonding of individual
“legos” on the target substrate. Thus, a first generation
of circuits and MEMS structures can be constructed from transfer
of basic building blocks from a mother substrate at essentially
ambient temperature. Thus, structures and substructures
can be created on any engineering substrate, including flexible
plastics or tapes. Furthermore, films and membranes of any material
can be transfer-deposited. Thus, remarkable advance can be made
in construction of devices and ICs requiring heterogeneous material
integration.
The following applications could
be impacted in a major way, if the proposed work is successfully
completed. |
| 1. |
The current
application domain for MEMS and ICs will increase significantly
as because of the high temperature processing (e.g., LPCVD polysilicon
is deposited at ~600ºC, reflow temperature in most ICs can
reach up to 220ºC), present MEMS and IC structures cannot be
created on flexible polymeric substrates. Similarly, several sensors
involve integration of films made from heterogeneous materials such
as polymers and metals and now even biological cells. A polymeric
impedance-based gas sensor that uses an SU-8 microwell structure
is an example of such a structure [24]. In order to microfabricate
arrays of sensors with unique polymers, the integration process
must contend with the large volume of solvent that is typically
present during polymer deposition. Furthermore, the microfabrication
technique must not damage previously deposited polymers. A somewhat
involved strategy is to use a permanent microwell structure to contain
the polymer–solvent solution in a well-defined sub-millimeter
area without disturbing previously deposited polymers. The technology
stemming from this research will bypass all these inefficiencies
by simply transferring the polymer film deposited on a separate
mother substrate to the exact desired location by using the existing
alignment technologies. |
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| 2. |
Subsequent
metallization at selected locations at the bottom of trenches cut
in a bulk micromachined Si wafer could be done with remarkably speed
and precision, compared with conventional wet-etching approaches.
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| 3. |
The
integration of circuits can greatly improve the performance of many
MEMS. To combine MEMS with ICs requires much careful consideration
of the manufacturing feasibility, complexity, reliability, yield
and cost. The questions are the following. Should MEMS and ICs be
monolithically integrated or separately produced and assembled together?
If integrated together, should the MEMS be fabricated on the substrate
before or after the ICs, or should the fabrication of both be interleaved
together? The method of fabricating separately and then assembling
has the lowest fabrication cost. While following the monolithic
integration of ICs first, the low processing temperature ceiling
(~400ºC) imposed by the materials (e.g., melting point of aluminum)
and electrical characteristics (i.e., movement of carefully designed
dopant distributions) severely limits the maximum processing temperature
for the subsequent steps used in the MEMS fabrication process (e.g.,
LPCVD polysilicon is deposited at ~600ºC). Monolithic integration
of MEMS first typically results in a substrate with a large surface
topology (e.g., several micrometers). An IC process with small features
requires a highly planarized substrate to obtain reasonable yields.
This issue can be addressed by adding additional processing steps,
at additional cost, to planarize the MEMS substrate before IC fabrication
begins [20]. Monolithic integration of both MEMS and ICs in a mixed
process by interleaving the processing steps for the MEMS and IC
components results in a shorter process cycle but the development
time is considerably longer. The outcome of
proposed research can virtually revolutionize this aspect of MEMS
manufacturing by pattern-transferring of IC circuitry parts or the
entire circuitry that has been deposited on a separate wafer. |
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| 4. |
The
proposed technology could allow complete transfer of ICs from a
Si wafer to a flexible substrate on which regular IC manufacturing
processes cannot be operated because of temperature constraints.
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| 5. |
The
basic building block for future nanocircuits are nanowires, which
can only be grown on specialized substrates having prescribed anisotropic
lattice-mismatches. Photolithography-based patterning is not possible
to use in the construction of such circuits. The proposed technology
can be used to construct the circuits by appropriate rotation of
the target substrate, and by utilizing the glass-modified stress
waves that allow separation of nanometer-thick features. |
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| 6. |
With
the advent of sensors and actuators, the use of piezoelectric, magnetic
(Ni, Fe, Co, and rare earth alloys), high temperature ceramics (SiC,
Si3N4), plastics, and dielectric films, are now frequently used
in conjunction with polysilicon, Gold, Cu, and Al. The selection
and sequencing of appropriate wet-etching steps to manufacture such
a heterogeneous device can become very challenging. The proposed
technology can overcome some of these challenges and allow integration
of heterogeneous materials in an efficient manner.
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| 7. |
The
present biosensor manufacturing is challenged by the ability to
transfer “sensing cells” to a specific cell adhesion
site inside a biosensor. Such sensor development requires choice
of cell culture medium that does not interfere with the already
released mechanical substructures. An appealing alternative would
be to transfer the cells directly to the site. In a separate unrelated
research we have shown how osteoblasts (bone-forming cells) and
fibroblasts can be separated from Ti and polymeric surfaces using
the stress wave technique discussed briefly above (Fig. 3). |
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Preliminary
Data
As a precursor to this proposal,
a gold wire pattern with individual wires of 1 mm x 60 ?m x 30 nm
were patterned on a Si wafer. An epoxy was spun on top of the lines.
The laser-generated stress wave, without any glass modification,
were used to separate the entire epoxy layer and caught on a regular
tape. Figure 3 shows a micrograph of the underside of the separated
epoxy layer, showing the separated gold line in its entirety. This
provides confidence in the possible success of the proposed work,
even though the gold adhesion is expected to be rather low. In a
separate preliminary work, an IC package with solder bumps attached
to underlying Si pads via intermetallic bonding (Fig. 4) was separated
by focusing the laser-generated stress waves on the package’s
backside. The separated bumps were caught on a regular tape, which
was placed in contact with bumps from top, prior to any stress wave
loading. The caught bumps are shown on the separated tape surface
in Fig. 5 on the right. This shows the potential for success of
the proposed work dealing with the transfer of IC features from
Si to plastic substrates. |
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Figure 3. Underside of the separated epoxy layer |
Figure 4. Solder bumps dettached from IC package |
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